32-bit SPARC V8 High-performance/Low-cost 32-bit Architecture

8-channel external bus controller

2-channel SDRAM controller with 32-bit data bus

Supports 100MHz maximum memory clock frequency

66 MHz PCI Interface Compliant with 2.2 PCI Specification

Three 8-bit UARTs

2 general purpose 24-bit timers and 1 watchdog timer

16 Parallel I/O Interface

5-stage Pipeline

8-Kbyte Multi-sets Data Cache

8-Kbyte Multi-sets Instruction Cache

Interrupt controller

Power-down function

Built-in Debug Support Unit (DSU)

Built-in PLL

16 Register Windows

On-chip AMBA Bus

8/16/32 -bit boot-PROM (Flash) Interface Possibilities

Chip Select Generator

Memory Interface

SPI Interface

Speed Optimized Code RAM Interface

Clock: 110 MHz

Performance: 110 MIPS

Voltage Operating Range: 3.3V I/O - 1.8V Core

Temperature Operating Range: -55°C to 125°C

Package: 256-pin QFP